Dangos 1 - 6 canlyniadau o 6 ar gyfer chwilio '"Logic synthesis."', amser ymholiad: 0.02e Mireinio'r Canlyniadau
  1. 1

    Modeling the wiring of deep submicron ICs. gan Walker, M.G

    Cyhoeddwyd yn IEEE spectrum
    Erthygl

    Modeling the wiring of deep submicron ICs.
  2. 2

    Globally updated mesochronous design style. gan Soderquist, I.

    Erthygl

    Globally updated mesochronous design style.
  3. 3

    Overview of a compiler for synthesizing MATLAB programs onto FPGAs. gan Banerjee, P.

    Erthygl

    Overview of a compiler for synthesizing MATLAB programs onto FPGAs.
  4. 4

    Robust Boolean reasoning for equivalence checking and functional property verification. gan Kuehlmann, A.

    Erthygl

    Robust Boolean reasoning for equivalence checking and functional property verification.
  5. 5

    Timing driven gate duplication. gan Srivastava, A.

    Erthygl

    Timing driven gate duplication.
  6. 6

    BDD decomposition for delay oriented pass transistor logic synthesis. gan Shelar, R.S

    Erthygl

    BDD decomposition for delay oriented pass transistor logic synthesis.

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