يعرض 1 - 10 نتائج من 11 نتيجة بحث عن '"Timing analysis."', وقت الاستعلام: 0.02s تنقيح النتائج
  1. 1

    Phase-time analysis of the leakage impulse current of faulty line-post pin insulators. حسب Kim, C.J

    الحاوية / القاعدة IEEE Transactions on power delivery
    مقال

    Phase-time analysis of the leakage impulse current of faulty line-post pin insulators.
  2. 2

    Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design. حسب Yu Cao

    الحاوية / القاعدة IEEE Transactions on VLSI systems
    مقال

    Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design.
  3. 3

    Designing an asynchronous microcontroller using Pipefitter. حسب Blunno, I.

    الحاوية / القاعدة IEEE Transactions on VLSI systems
    مقال

    Designing an asynchronous microcontroller using Pipefitter.
  4. 4

    Modeling subthreshold SOI logic for static timing analysis. حسب Valentian, A.

    الحاوية / القاعدة IEEE Transactions on VLSI systems
    مقال

    Modeling subthreshold SOI logic for static timing analysis.
  5. 5

    Loop-based interconnect modeling and optimization approach for multigigahertz clock network design. حسب Xuejue Huang

    الحاوية / القاعدة IEEE Journal of solid state circuits
    مقال

    Loop-based interconnect modeling and optimization approach for multigigahertz clock network design.
  6. 6

    Efficient asynchronous bundled-data pipelines for DCT matrix-vector multiplication. حسب Tugsinavisut, S.

    الحاوية / القاعدة IEEE Transactions on VLSI systems
    مقال

    Efficient asynchronous bundled-data pipelines for DCT matrix-vector multiplication.
  7. 7

    Compositional schedulability analysis of real-time systems using time Petri nets. حسب Dianxiang Xu

    الحاوية / القاعدة IEEE Transactions on software engineering
    مقال

    Compositional schedulability analysis of real-time systems using time Petri nets.
  8. 8

    Timing constraints for domino logic gates with timing-dependent keepers. حسب Seong-Ook Jung

    مقال

    Timing constraints for domino logic gates with timing-dependent keepers.
  9. 9

    Pattern generation for delay testing and dynamic timing analysis considering power-supply noise effects. حسب Krstic, A.

    مقال

    Pattern generation for delay testing and dynamic timing analysis considering power-supply noise effects.
  10. 10

    Linearization of the timing analysis and optimization of level-sensitive digital synchronous circuits. حسب Taskin, B.

    الحاوية / القاعدة IEEE Transactions on VLSI systems
    مقال

    Linearization of the timing analysis and optimization of level-sensitive digital synchronous circuits.

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