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  1. 1

    Introduction to SystemVerilog von Mehta, Ashok B.

    Veröffentlicht 2021
    Volltext
    Volltext
    Electronic Resource

    Introduction to SystemVerilog
  2. 2

    Finite state machines in hardware theory and design (with VHDL and SystemVerilog) von Pedroni, Volnei A.

    Veröffentlicht 2013
    Available for University of the Philippines Diliman via MIT Press Direct. Click here to access
    Also available remotely for University of the Philippines Diliman via MIT Press Direct. Click here to access thru EZproxy
    Electronic Resource

    Finite state machines in hardware theory and design (with VHDL and SystemVerilog)
  3. 3

    Finite state machines in hardware theory and design (with VHDL and SystemVerilog) von Pedroni, Volnei A.

    Veröffentlicht 2013
    Click here to access thru EZproxy
    Click here to access
    Electronic Resource

    Finite state machines in hardware theory and design (with VHDL and SystemVerilog)

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