Showing 1 - 2 results of 2 for search '', query time: 0.01s Refine Results
  1. 1

    An integration-biased BER-aware design methodology of a BPSK transceiver front-end for power line sensor nodes by Ortiz, Joana Rochelle R.

    Published 2014
    Thesis

    An integration-biased BER-aware design methodology of a BPSK transceiver front-end for power line sensor nodes
  2. 2

    PVT-aware digital techniques for low-power, 0.5V, on-chip processing unit for the SmartWire node in 65nm CMOS process by Sebastian, Sherry Joy Alvionne

    Published 2014
    Thesis

    PVT-aware digital techniques for low-power, 0.5V, on-chip processing unit for the SmartWire node in 65nm CMOS process

Search Tools: