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Power reduction techniques and BIST implementation on a DLX microprocessor using a 90nm CMOS process
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Agbayani, Jay-ar Anacleto
Izdano 2010
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Tutorial test generation for VLSI chips
Izdano 1988
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Automatic testing and evaluation of digital integrated circuits
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Healy, James Thomas 1940-
Izdano 1981
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Power optimized partial scan BIST implementation on DLX microprocessor
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Buenaventura, Arvi D.
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Diliman
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Mindanao
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Union Catalog (Buklod)
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UNIT LIBRARY
College of Engineering Library II
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L - Education
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Automatic test equipment
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Very large scale integration
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Agbayani, Jay-ar Anacleto
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Agrawal, Vishwani D. 1943-
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Buenaventura, Arvi D.
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Cruz, Maria Fatima Ofelia Dedios
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Healy, James Thomas 1940-
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IEEE Computer Society
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Miranda, Carlos Miguel A.
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Ramos, Katrina Aquino
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Salvacion, Ma. Katrina D.
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Seth, Sharad C.
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