検索結果 1 - 4 結果 / 4 検索語 '', 処理時間: 0.31秒 結果の絞り込み
  1. 1

    Power reduction techniques and BIST implementation on a DLX microprocessor using a 90nm CMOS process 著者: Agbayani, Jay-ar Anacleto

    出版事項 2010
    学位論文

    Power reduction techniques and BIST implementation on a DLX microprocessor using a 90nm CMOS process
  2. 2

    Tutorial test generation for VLSI chips

    出版事項 1988
    図書

    Tutorial test generation for VLSI chips
  3. 3

    Automatic testing and evaluation of digital integrated circuits 著者: Healy, James Thomas 1940-

    出版事項 1981
    図書

    Automatic testing and evaluation of digital integrated circuits
  4. 4

    Power optimized partial scan BIST implementation on DLX microprocessor 著者: Buenaventura, Arvi D.

    学位論文

    Power optimized partial scan BIST implementation on DLX microprocessor

検索ツール: