1 - 4 toradh á dtaispeáint as 4 toradh san iomlán ar an gcuardach '', am iarratais: 0.16s Beachtaigh na torthaí
  1. 1

    Power reduction techniques and BIST implementation on a DLX microprocessor using a 90nm CMOS process de réir Agbayani, Jay-ar Anacleto

    Foilsithe / Cruthaithe 2010
    Tráchtas

    Power reduction techniques and BIST implementation on a DLX microprocessor using a 90nm CMOS process
  2. 2

    Tutorial test generation for VLSI chips

    Foilsithe / Cruthaithe 1988
    LEABHAR

    Tutorial test generation for VLSI chips
  3. 3

    Automatic testing and evaluation of digital integrated circuits de réir Healy, James Thomas 1940-

    Foilsithe / Cruthaithe 1981
    LEABHAR

    Automatic testing and evaluation of digital integrated circuits
  4. 4

    Power optimized partial scan BIST implementation on DLX microprocessor de réir Buenaventura, Arvi D.

    Tráchtas

    Power optimized partial scan BIST implementation on DLX microprocessor

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