Finite state machines in hardware theory and design (with VHDL and SystemVerilog)

Finite state machines in hardware theory and design (with VHDL and SystemVerilog)

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Detalhes bibliográficos
Autor principal: Pedroni, Volnei A. (Autor)
Formato: Electronic Resource
Idioma:English
Publicado em: Cambridge, Massachusetts The MIT Press 2013.
Assuntos:
SystemVerilog (Computer hardware description language)
VHDL (Computer hardware description language)
Sequential machine theory > Data processing.
Computer systems > Mathematical models.
Electronic books.
Acesso em linha:Available for University of the Philippines Diliman via MIT Press Direct. Click here to access
Also available remotely for University of the Philippines Diliman via MIT Press Direct. Click here to access thru EZproxy