Champac, V., & Garcia Gervacio, J. (2018). Timing performance of nanometer digital circuits under process variations. Springer International Publishing. https://doi.org/10.1007/978-3-319-75465-9
Cita Chicago Style (17a ed.)Champac, Victor, y Jose Garcia Gervacio. Timing Performance of Nanometer Digital Circuits Under Process Variations. Cham: Springer International Publishing, 2018. https://doi.org/10.1007/978-3-319-75465-9.
Cita MLA (9a ed.)Champac, Victor, y Jose Garcia Gervacio. Timing Performance of Nanometer Digital Circuits Under Process Variations. Springer International Publishing, 2018. https://doi.org/10.1007/978-3-319-75465-9.
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