APA引文

Barkalov, A., Titarenko, L., Kolopienczyk, M., Mielcarek, K., & Bazydlo, G. (2016). Logic synthesis for FPGA-based finite state machines. Springer. https://doi.org/10.1007/978-3-319-24202-6

Chicago Style (17th ed.) Citation

Barkalov, Alexander, Larysa Titarenko, Malgorzata Kolopienczyk, Kamil Mielcarek, and Grzegorz Bazydlo. Logic Synthesis for FPGA-based Finite State Machines. Cham: Springer, 2016. https://doi.org/10.1007/978-3-319-24202-6.

MLA引文

Barkalov, Alexander, et al. Logic Synthesis for FPGA-based Finite State Machines. Springer, 2016. https://doi.org/10.1007/978-3-319-24202-6.