Advanced hardware design for error correcting codes - Chavet, Cyrille; Coussy, Philippe; SpringerLink (Online service). (Cham Springer International Publishing, 2015)
User Needs -- Challenges and Limitations for Very High Throughput Decoder Architectures for Soft-Decoding -- Implementation of Polar Decoders -- Parallel architectures for Turbo Product Codes Decoding -- VLSI implementations of sphere detectors -- Stochastic Decoders for LDPC Codes -- MP-SoC/NoC architectures for error correction -- ASIP design for multi-standard channel decoders -- Hardware design of parallel interleaver architecture: a survey.
Electronic reproduction.
Keywords: Error-correcting codes (Information theory); Decoders (Electronics); Electronic books