Design methodology for process and temperature resilience of switched capacitor regulator for power line harvesting applications - Pelayo, Bernard Raymond Donasco
Sensor blocks of the SmartWire sensor node require a supply voltage of 500mV with only +/- 20mV variation to minimize error contribution of the supply voltage to the ADC conversion. A methodolgy in designing switched capacitor (SC) DC-DC regulators by error allocation to minimize the effect of process and temperature variations is presented wherein the main tuning parameter is the output impedance. This parameter is mainly affected by the switching frequency and on-state resistance. The switching frequency of the regulator is modulated as load current varies to maintain the supply voltage. The error due to the on-state resistance is designed such that it does not exceed the target error allocation. The methodology is used to design a switched capacitor regulator in 65nm CMOS to supply power to a current sensor and temperature sensor. The SC regulator was able to meet the design specifications for a load range of 2uA to 12uA across process variations and temperature range of 0 to 100 degree Celsius.