APA引文

Saxena, P., Shelar, R. S., & Sapatnekar, S. S. (2007). Routing congestion in VLSI circuits: Estimation and optimization. Springer.

Chicago Style (17th ed.) Citation

Saxena, Prashant, Rupesh S. Shelar, and Sachin S. Sapatnekar. Routing Congestion in VLSI Circuits: Estimation and Optimization. New York: Springer, 2007.

MLA引文

Saxena, Prashant, et al. Routing Congestion in VLSI Circuits: Estimation and Optimization. Springer, 2007.