00000cmm a22000004a 4500 UP-99796217611212132 Buklod 20140424084539.0 m go j cr |nu|||auu|a 110617s2011 xx u eng d 9789400713383 (eBook) 940071338X (eBook) (iLib)UPD-00214608302 DML eng DMLUC TK 7895 G36 S43 2011eb Security trends for FPGAS [electronic resource] from secured to secure reconfigurable systems Benoit Badrignans ... [et al.], editors. Dordrecht New York Springer c2011. 1 online resource (xv, 196 p.) 1. Introduction and Objectives -- 2. Security FPGA Analysis -- 3. Side Channel Attacks -- 4. Countermeasures against Physical Attacks in FPGAs -- 5. True Random Number Generators in FPGAs -- 6. Embedded Systems Security for FPGA -- 7. Conclusions. IP-based subscription, access limited to within on campus computer network. Access via Electronic Resources of the UPD University Library Website. This book is designed for all those who would like to upgrade their knowledge in the field of security and digital platforms including reconfigurable FPGAs.  It is the result of a national project (ICTER) funded by the French National Research Agency (ANR) and involving four research centers (Montpellier, Paris, Lorient, Saint-Etienne) and a private company. This book details several solutions for secure application execution and application update. It presents an analysis of current threats against embedded systems and especially FPGAs. The discussion includes requirements to build a secure system, according to the FIPS standard. New secure schemes are proposed to ensure data confidentiality, integrity and authentication.  These new schemes fit the tight requirements of embedded systems (performance, memory footprint, logic area and energy consumption). The cost of different architectures for performance, memory, and energy are estimated. Innovative solutions for remote reconfigurations are also detailed, taking into account security when downloading a new bitstream.  Since the replay of an old bitstream in the field is a major threat for embedded systems, this issue is discussed and an original solution proposed. Proposes solutions at the logical, architecture and system levels in order to provide a global solution Clearly defines the security boundaries for a system Describes different hierarchical levels of a design, from application to technological levels. Electronic reproduction. New York SpringerLink 2011. Available via World Wide Web through SpringerLink. Field programmable gate arrays Security measures. Electronic books. SpringerLink (Online service). Available for University of the Philippines Diliman via SpringerLink. Click here to access http://link.springer.com/book/10.1007/978-94-007-1338-3 FO Monograph UPD DMLR Electronic Resource