00000cmm a22000004a 4500 UP-99796217611212018 Buklod 20140423144648.0 m go j cr cn |||aaaaa 101029s2011 xxu u | eng d 9781441968654 (eBook) 1441968652 (eBook) (iLib)UPD-00214608166 DLC DML eng DMLUC TK 7895 E42 H32 2011eb Hansson, Andreas. author. On-chip interconnect with Aelite [electronic resource] composable and predictable systems Andreas Hansson, Kees Goossens. New York Springer 2011. 1 online resource (ix, 208 p.) ill. Embedded Systems IP-based subscription, access limited to within on-campus computer network. Access via Electronic Resources of the UPD University Library Website. On-Chip Interconnect with aelite: Composable and Predictable Systems by: (Authors) Andreas Hansson Kees Goossens Embedded systems are comprised of components integrated on a single circuit, a System on Chip (SoC). One of the critical elements of such an SoC, and the focus of this work, is the on-chip interconnect that enables different components to communicate with each other. The book provides a comprehensive description and implementation methodology for the Philips/NXP Aethereal/aelite Network-on-Chip (NoC). The presentation offers a systems perspective, starting from the system requirements and deriving and describing the resulting hardware architectures, embedded software, and accompanying design flow. Readers get an in depth view of the interconnect requirements, not centered only on performance and scalability, but also the multi-faceted, application-driven requirements, in particular composability and predictability. The book shows how these qualitative requirements are implemented in a state-of-the-art on-chip interconnect, and presents the realistic, quantitative costs. Uses real-world illustrations extensively, in the form of case studies and examples that communicate the power of the methods presented; Uses one consistent, running example throughout the book. This example is introduced in the introductory chapter and supports the presentation throughout the work, with additional details given in each chapter; Content has both breadth (architecture, resource allocation, hardware/software instantiation, formal verification) and depth (block-level architecture description, allocation algorithms, complete run-time APIs, detailed formal models, complete case studies mapped to FPGAs); Includes numerous case studies, e.g. a JPEG decoder, set-top box and digital radio design. Electronic reproduction. New York SpringerLink 2011. Available via World Wide Web through SpringerLink. Systems on a chip. Embedded computer systems. Electronic books. Goossens, Kees. SpringerLink (Online service). Available for University of the Philippines Diliman via SpringerLink. Click here to access http://link.springer.com/book/10.1007/978-1-4419-6865-4 FO Monograph UPD DMLR Electronic Resource