High-Level Verification Methods and Tools for Verification of System-Level Designs

This book looks at the problem of design verification with a view towards speeding up the process of verification by developing methods that apply to levels of abstraction above RTL or synchronous logic descriptions. Typically such descriptions capture design functionality at the system level, hence...

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الحاوية / القاعدة:	Springer eBooks.
المؤلفون الرئيسيون:	Kundu, Sudipta (مؤلف), Lerner, Sorin (مؤلف), Gupta, Rajesh K. (مؤلف)
مؤلف مشترك:	SpringerLink (Online service)
التنسيق:	Electronic Resource
اللغة:	English
منشور في:	New York, NY Springer New York 2011.
الموضوعات:	Integrated circuits > Verification. Systems on a chip > Testing. Systems on a chip > Design. Electronic book.
الوصول للمادة أونلاين:	Available for University of the Philippine Diliman via Springerlink. Click here to access