Power reduction techniques and BIST implementation on a DLX microprocessor using a 90nm CMOS process
As integrated circuits become more complex, the need for efficient chip testing arises. The addition of external automated test equipment (ATE) is a common solution to this need. However, ATE increases the cost of testing in terms of time and resources. An alternative to this is the implementation o...
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| 其他作者: | , |
| 格式: | Thesis |
| 語言: | English |
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2010.
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