An optimization approach in water selection in a assembly - Lorenzo, Lowell (Philippine Industrial Engineering Journal)
The phenomenon of circuit yield of fabricated wafers of integrated circuit chips in the manufacture of semiconductor devices in an assembly/test manufacturing environment is a major factor to consider in the attainment of high delivery reliability and minimum inventory levels of work-in-process during the production planning process at the shop floor. A mathematical programming model is developed to address this phenomenon with the aim of optimizing the selection of wafers of integrated circuit chips that will satisfy customer demand and at the same time yield the minimum number of semiconductor devices produced without orders due to the yield loss of the wafers. Validation of the mathematical model based on the results of a pilot project has demonstrated the efficiency of this optimization approach.