1.2-V 5.8-GHz 90nm CMOS RF power amplifier parameter enhancement techniques - Dela Cruz, Sherlyn Caubalejo (College of Engineering, University of the Philippines Diliman, 2013)
Today's consumers demand for high-speed, ubiquitous, and efficient wireless communication systems, allowing more sophisticated wireless standards such as WiMAX to emerge and satisfy these needs. It is also desired to create single, low-cost, and compact transceivers, making CMOS the chosen technology for implementation. The stringent PA specifications required from the transceivers, together with the scaling of supply voltage and increased process variability of aggresively scaled CMOS processes, make Power Amplifier (PA) design more difficult and conventional design strategies insufficient. To achieve the required performance despite these design challenges, parameter enhancement techniques can be applied to the PA. In this study, two techniques--the Transformer-based power combining for higher output power and Diode linearization for increased linearity--are studied to determine their effectiveness. Using a 1.2-V 90nm CMOS process, these techniques are individually implemented on a base Class AB PA and then combined to analyze their performance. A test chip containing the power combining network, two transformers, and simple PA is also fabricated. The obtained results show that the transformer-based power combining technique has increased the PA output power by 14dB, enough to reach the +23dBm power specifications of WiMAX standard. However, this is achieved at the expense of 2X increase in die area because of transformers. The diode linearizer, on the other hand, improves the PA compression point by 0.7dB, IMD3 by 2.15dB, and output harmonic susceptibility by 6.69%. These are all attained in exchange of a 1.1dB insertion loss.