Crosstalk noise reduction in synthesized digital logic circuits.

Crosstalk noise reduction in synthesized digital logic circuits.

As CMOS technology scales into the deep submicrometer regime, digital noise is becoming a metric of importance comparable to area, timing, and power, for analysis and design of CMOS VLSI systems. Noise has two detrimental effects in digital circuits: First, it can destroy logical information carried...

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Pubblicato in:IEEE Transactions on VLSI systems 11, 6 (2003).
Autore principale: Milter, O.
Natura: Articolo
Lingua:English
Soggetti:
CMOS VLSI systems.
CMOS technology.
Automatically synthesizing CMOS circuits.
Capacitive coupling.
Circuit nets.
Crosstalk noise problem.
Crosstalk noise reduction.
Digital circuits.
Digital logic circuits.
Digital noise.
Gate-level netlist generation.
Microprocessor circuits.
Synthesized circuits.