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This paper presents a detailed study on the effects of gate-to-body tunneling current on partially depleted silicon-on-insulator (PD/SOI) CMOS SRAM. It is shown that the presence of gate-to-body tunneling current changes the strength of individual cell transistor in the quiescent (standby) state, th...
| Publicat a: | IEEE Transactions on VLSI systems 11, 6 (2003). |
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| Autor principal: | |
| Format: | Article |
| Idioma: | English |
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