Karandikar, S. Technology mapping for SOI domino logic incorporating solutions for the parasitic bipolar effect. IEEE Transactions on VLSI systems.
Citace podle Chicago (17th ed.)Karandikar, S.K. "Technology Mapping for SOI Domino Logic Incorporating Solutions for the Parasitic Bipolar Effect." IEEE Transactions on VLSI Systems .
Citace podle MLA (9th ed.)Karandikar, S.K. "Technology Mapping for SOI Domino Logic Incorporating Solutions for the Parasitic Bipolar Effect." IEEE Transactions on VLSI Systems, .
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