APA (7th ed.) Citation

Karandikar, S. Technology mapping for SOI domino logic incorporating solutions for the parasitic bipolar effect. IEEE Transactions on VLSI systems.

Chicago Style (17th ed.) Citation

Karandikar, S.K. "Technology Mapping for SOI Domino Logic Incorporating Solutions for the Parasitic Bipolar Effect." IEEE Transactions on VLSI Systems .

MLA (9th ed.) Citation

Karandikar, S.K. "Technology Mapping for SOI Domino Logic Incorporating Solutions for the Parasitic Bipolar Effect." IEEE Transactions on VLSI Systems, .

Warning: These citations may not always be 100% accurate.