Karandikar, S. Technology mapping for SOI domino logic incorporating solutions for the parasitic bipolar effect. IEEE Transactions on VLSI systems.
Style de citation Chicago (17e éd.)Karandikar, S.K. "Technology Mapping for SOI Domino Logic Incorporating Solutions for the Parasitic Bipolar Effect." IEEE Transactions on VLSI Systems .
Style de citation MLA (9e éd.)Karandikar, S.K. "Technology Mapping for SOI Domino Logic Incorporating Solutions for the Parasitic Bipolar Effect." IEEE Transactions on VLSI Systems, .
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