00000cab a22000003a 4500 UP-99796217609624647 Buklod 20231007234420.0 m |o d | ta 110119s xx d | ||r ||||| || DENGII eng Qinwei Xu Equivalent-circuit interconnect modeling based on the fifth-order differential quadrature methods. pp. 1068-1079 This paper introduces an efficient and passive discrete modeling technique for estimating signal propagation delays through on-chip long interconnects that are represented as distributed RLC transmission lines. The proposed delay model is based on a less frequently used numerical approximation technique, called the differential quadrature method (DQM). The DQM can compute the partial derivative of a function at any arbitrary point located within a prespecified closed domain of the function by quickly estimating the weighted linear sum of values of the function at a relatively small set of well-chosen grid points within the domain. By using the fifth-order DQM, a new approximation framework is constructed in this paper for discretizing the distributed RLC interconnect and thereafter modeling its delay. Due to high efficiency of DQM approximation, the proposed framework requires only few grid points to achieve good accuracy. The presented equivalent-circuit model appears like the ones derived by the finite difference (FD) method. However, it has higher accuracy and less internal nodes than generated by the FD-based modeling. The fifth-order DQM modeling technique is shown to preserve passivity. It has linear forms that are compatible with the passive order-reduction algorithm for linear network. Numerical experiments show that the proposed modeling approach leads to high accuracy as well as high efficiency. Arbitrary point. Chip long interconnects. Closed domain function. Distributed RLC transmission lines. Equivalent-circuit interconnect modeling. Fifth-order differential quadrature methods. Finite difference methods. Grid points. Less internal nodes. Linear network. Numerical approximation. Partial derivative function. Passive discrete modeling. Passive order-reduction algorithm. Signal propagation delays. Weighted linear sum values. IEEE Transactions on VLSI systems 11, 6 (2003). FO UPD DENG-II Article