A fast on-chip profiler memory using a pipelined binary tree.
We introduce a novel memory architecture that can count the occurrences of patterns on a system's bus, a task known as profiling. Such profiling can serve a variety of purposes, like detecting a microprocessor's software hot spots or frequently used data values, which can be used to optimi...
| 出版年: | IEEE Transactions on VLSI systems 12, 1 (2004). |
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| 第一著者: | |
| フォーマット: | 論文 |
| 言語: | English |
| 主題: |