Lysecky, R. A fast on-chip profiler memory using a pipelined binary tree. IEEE Transactions on VLSI systems.
Cita Chicago (17th ed.)Lysecky, R. "A Fast On-chip Profiler Memory Using a Pipelined Binary Tree." IEEE Transactions on VLSI Systems .
Cita MLA (9th ed.)Lysecky, R. "A Fast On-chip Profiler Memory Using a Pipelined Binary Tree." IEEE Transactions on VLSI Systems, .
Atenció: Aquestes cites poden no estar 100% correctes.