Lua APA (7ú heag.)

Lysecky, R. A fast on-chip profiler memory using a pipelined binary tree. IEEE Transactions on VLSI systems.

Lua i Stíl Chicago (17ú heag.)

Lysecky, R. "A Fast On-chip Profiler Memory Using a Pipelined Binary Tree." IEEE Transactions on VLSI Systems .

Lua MLA (9ú heag.)

Lysecky, R. "A Fast On-chip Profiler Memory Using a Pipelined Binary Tree." IEEE Transactions on VLSI Systems, .

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