A jitter characterization system using a component-invariant Vernier delay line.

A jitter characterization system using a component-invariant Vernier delay line.

Jitter characterization has become significantly more important for systems running at multigigahertz data rates. Time and frequency domain characterization of jitter is thus a crucial element for system specification testing. Time domain jitter measurement on a data signal with subgate timing resol...

সম্পূর্ণ বিবরণ

গ্রন্থ-পঞ্জীর বিবরন
প্রকাশিত:IEEE Transactions on VLSI systems 12, 1 (2004).
প্রধান লেখক: Chan, A.H
বিন্যাস: প্রবন্ধ
ভাষা:English
বিষয়গুলি:
0.18 micron.
19 ps.
CMOS process.
D-latches.
IC design.
RTL.
Si.
VDL.
Complementary metal-oxide-semiconductor process.
Component invariant Vernier delay line.
Data signal.
Delay chains.
Delay elements.
Field programmable gate array.
Frequency domain characterization.
Integrated circuit.
Jitter characterization system.
Measurement device.
Multigigahertz data rates.
Production test.
Register transfer level description.
Silicon.
Subgate timing resolution.
System specification testing.
Time domain characterization.
Time domain jitter measurement.
Timing resolution.