Nam Sung Kim. Circuit and microarchitectural techniques for reducing cache leakage power. IEEE Transactions on VLSI systems.
Citace podle Chicago (17th ed.)Nam Sung Kim. "Circuit and Microarchitectural Techniques for Reducing Cache Leakage Power." IEEE Transactions on VLSI Systems .
Citace podle MLA (9th ed.)Nam Sung Kim. "Circuit and Microarchitectural Techniques for Reducing Cache Leakage Power." IEEE Transactions on VLSI Systems, .
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