APA (7th ed.) Citation

Neve, A. Power-delay product minimization in high-performance 64-bit carry-select adders. IEEE Transactions on VLSI systems.

Chicago Style (17th ed.) Citation

Neve, A. "Power-delay Product Minimization in High-performance 64-bit Carry-select Adders." IEEE Transactions on VLSI Systems .

MLA (9th ed.) Citation

Neve, A. "Power-delay Product Minimization in High-performance 64-bit Carry-select Adders." IEEE Transactions on VLSI Systems, .