APA (7th ed.) Citation

Joyner, J. Global interconnect design in a three-dimensional system-on-a-chip. IEEE Transactions on VLSI systems.

Chicago Style (17th ed.) Citation

Joyner, J.W. "Global Interconnect Design in a Three-dimensional System-on-a-chip." IEEE Transactions on VLSI Systems .

MLA (9th ed.) Citation

Joyner, J.W. "Global Interconnect Design in a Three-dimensional System-on-a-chip." IEEE Transactions on VLSI Systems, .