APA (7th ed.) Citation

Quach, N. Systematic IEEE rounding method for high-speed floating-point multipliers. IEEE Transactions on VLSI systems.

Chicago Style (17th ed.) Citation

Quach, N.T. "Systematic IEEE Rounding Method for High-speed Floating-point Multipliers." IEEE Transactions on VLSI Systems .

MLA (9th ed.) Citation

Quach, N.T. "Systematic IEEE Rounding Method for High-speed Floating-point Multipliers." IEEE Transactions on VLSI Systems, .

Warning: These citations may not always be 100% accurate.