Quach, N. Systematic IEEE rounding method for high-speed floating-point multipliers. IEEE Transactions on VLSI systems.
Citace podle Chicago (17th ed.)Quach, N.T. "Systematic IEEE Rounding Method for High-speed Floating-point Multipliers." IEEE Transactions on VLSI Systems .
Citace podle MLA (9th ed.)Quach, N.T. "Systematic IEEE Rounding Method for High-speed Floating-point Multipliers." IEEE Transactions on VLSI Systems, .
Upozornění: Tyto citace jsou generovány automaticky. Nemusí být zcela správně podle citačních pravidel..