00000cab a22000003a 4500 UP-99796217609624483 Buklod 20231007234423.0 m |o d | ta 110118s xx d | ||r ||||| || DENGII eng Byonghyo Shim Reliable low-power digital signal processing via reduced precision redundancy. pp. 497-510 In this paper, we present a novel algorithmic noise-tolerance (ANT) technique referred to as reduced precision redundancy (RPR). RPR requires a reduced precision replica whose output can be employed as the corrected output in case the original system computes erroneously. When combined with voltage overscaling (VOS), the resulting soft digital signal processing system achieves up to 60% and 44% energy savings with no loss in the signal-to-noise ratio (SNR) for receive filtering in a QPSK system and the butterfly of fast Fourier transform (FFT) in a WLAN OFDM system, respectively. These energy savings are with respect to optimally scaled (i.e., the supply voltage equals the critical voltage Vdd-crit) present day systems. Further, we show that the RPR technique is able to maintain the output SNR for error rates of up to 0.09/sample and 0.06/sample in an finite impulse response filter and a FFT block, respectively. CMOS. FFT. WLAN OFDM system. Algorithmic noise-tolerance. Digital signal processing. Fast Fourier transform. Reduced precision redundancy. Reliable low power digital signal processing. Signal-to-noise ratio. Voltage overscaling. IEEE Transactions on VLSI systems 12, 5 (2004). FO UPD DENG-II Article