Pulsed wave interconnect. - Pingshan Wang
Pulsed wave interconnect is proposed for global interconnect applications. Signals are represented by localized wave-packets that propagate along the interconnect lines at the local speed of light to trigger the receivers. Energy consumption is reduced through charging up only part of the interconnect lines and using the voltage doubling property of the receiver gate capacitances. In a 0.18-μm CMOS technology case study, SPICE simulations show that pulsed wave interconnect can save up to 50% of energy and ∼30% of chip area in comparison with the repeater insertion method. A proposed signal splitting structure provides reasonable isolations between different receivers. Measured S-parameters of 3.8-mm interconnect lines fabricated through CMOS foundry showed that the distortion and attenuation of a pico second signal are much less serious than the theoretical predictions. Pulsed wave interconnect also enables time division application of a single line to boost its bit rate capacity. The use of nonlinear transmission lines (NLTL) is also proposed to overcome pulse broadening and attenuation caused by dispersion and frequency-dependent losses. Pulsed waves on an NLTL may be generated, transmitted, split and detected with components realizable in bulk and SOI CMOS technologies. Tapered NLTL can be used for pulse compression. NLTL edge sharpening abilities may be applicable for signal rise time control.
Keywords: 0.18 micron; 3.8 mm; CMOS technology; S-parameters.; SOI CMOS; SPICE simulations; VLSI; Attenuation; Edge sharpening; Energy consumption; Frequency-dependent losses; Global interconnect applications; Interconnect lines; Localized wave-packets.; Nonlinear transmission lines; Pulse broadening; Pulsed wave interconnect; Receiver gate capacitances; Signal rise time control; Signal splitting structure; Voltage doubling; Wafer-scale-integration.