Low-latency architectures for high-throughput rate Viterbi decoders.
In this paper, a novel K-nested layered look-ahead method and its corresponding architecture, which combine K-trellis steps into one trellis step (where K is the encoder constraint length), are proposed for implementing low-latency high-throughput rate Viterbi decoders. The proposed method guarantee...
| Publié dans: | IEEE Transactions on VLSI systems 12, 6 (2004). |
|---|---|
| Auteur principal: | |
| Format: | Article |
| Langue: | English |
| Sujets: |