Young, E. Placement constraints in floorplan design. IEEE Transactions on VLSI systems.
Chicago Style (17th ed.) CitationYoung, E.F.Y. "Placement Constraints in Floorplan Design." IEEE Transactions on VLSI Systems .
MLA (9th ed.) CitationYoung, E.F.Y. "Placement Constraints in Floorplan Design." IEEE Transactions on VLSI Systems, .
Warning: These citations may not always be 100% accurate.