Jian Liang. An architecture and compiler for scalable on-chip communication. IEEE Transactions on VLSI systems.
शिकागो शैली (17वां संस्करण) प्रशस्ति पत्रJian Liang. "An Architecture and Compiler for Scalable On-chip Communication." IEEE Transactions on VLSI Systems .
एमएलए (9वां संस्करण) प्रशस्ति पत्रJian Liang. "An Architecture and Compiler for Scalable On-chip Communication." IEEE Transactions on VLSI Systems, .
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