Multiple-symbol parallel decoding for variable length codes.

Multiple-symbol parallel decoding for variable length codes.

In this paper, a multiple-symbol parallel variable length decoding (VLD) scheme is introduced. The scheme is capable of decoding all the codewords in an N-bit block of encoded input data stream. The proposed method partially breaks the recursive dependency related to the VLD. First, all possible cod...

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Xehetasun bibliografikoak
Argitaratua izan da:IEEE Transactions on VLSI systems 12, 7 (2004).
Egile nagusia: Nikara, J.
Formatua: Artikulua
Hizkuntza:English
Gaiak:
FPGA.
MPEG.
Codewords.
Encoded input data stream.
Feasibility.
Field programmable gate array technology.
Limiting factors.
Moving picture experts group.
Multiple symbol parallel decoding.
N bit block.
Recursive selection.
Standard benchmark scenes.
Variable length codes.
Variable length decoder.