Cita APA (7a ed.)

Shinn-Ying Ho. An orthogonal simulated annealing algorithm for large floorplanning problems. IEEE Transactions on VLSI systems.

Cita Chicago Style (17a ed.)

Shinn-Ying Ho. "An Orthogonal Simulated Annealing Algorithm for Large Floorplanning Problems." IEEE Transactions on VLSI Systems .

Cita MLA (9a ed.)

Shinn-Ying Ho. "An Orthogonal Simulated Annealing Algorithm for Large Floorplanning Problems." IEEE Transactions on VLSI Systems, .