APA (7th ed.) Citation

Yen-Jen Chang. Zero-aware asymmetric SRAM cell for reducing cache power in writing zero. IEEE Transactions on VLSI systems.

Chicago Style (17th ed.) Citation

Yen-Jen Chang. "Zero-aware Asymmetric SRAM Cell for Reducing Cache Power in Writing Zero." IEEE Transactions on VLSI Systems .

MLA (9th ed.) Citation

Yen-Jen Chang. "Zero-aware Asymmetric SRAM Cell for Reducing Cache Power in Writing Zero." IEEE Transactions on VLSI Systems, .