Yen-Jen Chang. Zero-aware asymmetric SRAM cell for reducing cache power in writing zero. IEEE Transactions on VLSI systems.
Citazione stile Chigago Style (17a edizione)Yen-Jen Chang. "Zero-aware Asymmetric SRAM Cell for Reducing Cache Power in Writing Zero." IEEE Transactions on VLSI Systems .
Citatione MLA (9a ed.)Yen-Jen Chang. "Zero-aware Asymmetric SRAM Cell for Reducing Cache Power in Writing Zero." IEEE Transactions on VLSI Systems, .
Attenzione: Queste citazioni potrebbero non essere precise al 100%.