Low-power instruction bus encoding for embedded processors.

Low-power instruction bus encoding for embedded processors.

This paper presents a low-power encoding framework for embedded processor instruction buses. The encoder is capable of adjusting its encoding not only to suit applications but furthermore to suit different aspects of particular program execution. It achieves this by exploiting application-specific k...

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Detalles Bibliográficos
Publicado en:IEEE Transactions on VLSI systems 12, 8 (2004).
Autor Principal: Petrov, P.
Formato: Artigo
Idioma:English
Subjects:
Bit transition minimization.
Bus coupling effects.
Embedded processors.
Encoding transformations.
Foremost contributor.
Functional transformations.
Instruction bus lines.
Instruction transformations.
Low power instruction bus encoding.
Power dissipation.
Program execution.
Switching activity.