00000cab a22000003a 4500 UP-99796217609624380 Buklod 20231007234426.0 m |o d | ta 110118s xx d | ||r ||||| || DENGII eng Perri, S. Variable precision arithmetic circuits for FPGA-based multimedia processors. pp. 995-999 This brief describes new efficient variable precision arithmetic circuits for field programmable gate array (FPGA)-based processors. The proposed circuits can adapt themselves to different data word lengths, avoiding time and power consuming reconfiguration. This is made possible thanks to the introduction of on purpose designed auxiliary logic, which enables the new circuits to operate in single instruction multiple data (SIMD) fashion and allows high parallelism levels to be guaranteed when operations on lower precisions are executed. The new SIMD structures have been designed to optimally exploit the resources of a widely used family of SRAM-based FPGAs, but their architectures can be easily adapted to any either SRAM-based or antifuse-based FPGA chips. FPGA-based multimedia processors. SIMD structures. SRAM-based FPGA. Antifuse-based FPGA chips. Auxiliary logic design. Field programmable gate array. Power consuming reconfiguration. Single instruction multiple data fashion. Variable precision arithmetic circuits. IEEE Transactions on VLSI systems 12, 9 (2004). FO UPD DENG-II Article