A behavioral synthesis system for asynchronous circuits.

Behavioral synthesis of synchronous systems is a well established and researched area. The transformation of behavioral description into a datapath and control graph, and hence, to a structural realization usually requires three fundamental steps: 1) scheduling (the mapping of behavioral operations...

詳細記述

書誌詳細
出版年:	IEEE Transactions on VLSI systems 12, 9 (2004).
第一著者:	Sacker, M.
フォーマット:	論文
言語:	English
主題:	Abstract functional units. Asynchronous circuits. Asynchronous structures. Automatically generated control graph. Behavioral operation mapping. Behavioral synthesis system. Clock speed. Combinational logic delay. Complex sequence generator control. Functional unit mapping. Intelligent manipulation. Optimization. Physical cells. Registers. Scheduling. Single-state machines. Synchronizing clock. Synchronous counterparts. Synchronous system synthesis. Timeslot-timeslot transitions.