Xinmiao Zhang. High-speed VLSI architectures for the AES algorithm. IEEE Transactions on VLSI systems.
Lua i Stíl Chicago (17ú heag.)Xinmiao Zhang. "High-speed VLSI Architectures for the AES Algorithm." IEEE Transactions on VLSI Systems .
Lua MLA (9ú heag.)Xinmiao Zhang. "High-speed VLSI Architectures for the AES Algorithm." IEEE Transactions on VLSI Systems, .
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