Xinmiao Zhang. High-speed VLSI architectures for the AES algorithm. IEEE Transactions on VLSI systems.
Chicago Style (17th ed.) CitationXinmiao Zhang. "High-speed VLSI Architectures for the AES Algorithm." IEEE Transactions on VLSI Systems .
MLA (9th ed.) CitationXinmiao Zhang. "High-speed VLSI Architectures for the AES Algorithm." IEEE Transactions on VLSI Systems, .
Warning: These citations may not always be 100% accurate.