Error-correction and crosstalk avoidance in DSM busses.

Aggressive process scaling and increasing clock rates have made crosstalk noise an important issue in VLSI design. Switching on long, adjacent bus wires can lead to timing violations and logic faults. At the same time, system-level interconnects have also become more susceptible to other less predic...

全面介紹

書目詳細資料
發表在:IEEE Transactions on VLSI systems 12, 10 (2004).
主要作者: Patel, K.N
格式: Article
語言:English
主題: