Error-correction and crosstalk avoidance in DSM busses.

Aggressive process scaling and increasing clock rates have made crosstalk noise an important issue in VLSI design. Switching on long, adjacent bus wires can lead to timing violations and logic faults. At the same time, system-level interconnects have also become more susceptible to other less predic...

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Manylion Llyfryddiaeth
Cyhoeddwyd yn:IEEE Transactions on VLSI systems 12, 10 (2004).
Prif Awdur: Patel, K.N
Fformat: Erthygl
Iaith:English
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