Sequential delay budgeting with interconnect prediction.

Delay budgeting is a process of determining upper bounds for net delays to guide timing-driven placement. The existing approaches deal de facto only with combinational circuits. However, incorporating retiming into delay budgeting introduces more freedom to optimize sequential circuits. In this pape...

詳細記述

書誌詳細
出版年:IEEE Transactions on VLSI systems 12, 10 (2004).
第一著者: Chao-Yang Yeh
フォーマット: 論文
言語:English
主題: