Mohanram, K. Lowering power consumption in concurrent checkers via input ordering. IEEE Transactions on VLSI systems.
Chicago Style (17th ed.) CitationMohanram, K. "Lowering Power Consumption in Concurrent Checkers via Input Ordering." IEEE Transactions on VLSI Systems .
MLA (9th ed.) CitationMohanram, K. "Lowering Power Consumption in Concurrent Checkers via Input Ordering." IEEE Transactions on VLSI Systems, .
Warning: These citations may not always be 100% accurate.