Mohanram, K. Lowering power consumption in concurrent checkers via input ordering. IEEE Transactions on VLSI systems.
Chicago Style (17th ed.) CitationMohanram, K. "Lowering Power Consumption in Concurrent Checkers via Input Ordering." IEEE Transactions on VLSI Systems .
MLA citiranjeMohanram, K. "Lowering Power Consumption in Concurrent Checkers via Input Ordering." IEEE Transactions on VLSI Systems, .
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