Yuh-Fang Tsai. Characterization and modeling of run-time techniques for leakage power reduction. IEEE Transactions on VLSI systems.
Chicago Style (17th ed.) CitationYuh-Fang Tsai. "Characterization and Modeling of Run-time Techniques for Leakage Power Reduction." IEEE Transactions on VLSI Systems .
MLA (9th ed.) CitationYuh-Fang Tsai. "Characterization and Modeling of Run-time Techniques for Leakage Power Reduction." IEEE Transactions on VLSI Systems, .
Warning: These citations may not always be 100% accurate.