Robust circuit and system design methodologies for nanometer-scale devices and single-electron transistors.

In this paper, various circuit and system level design challenges for nanometer-scale devices and single-electron transistors are discussed, with an emphasis to the functional robustness and fault tolerance point of view. A set of general guidelines is identified for the design of very high-density...

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Bibliographic Details
Published in:	IEEE Transactions on VLSI systems 12, 11 (2004).
Main Author:	Schmid, A.
Format:	Article
Language:	English
Subjects:	CMOS integrated circuits. Circuit design. Circuit performance. Error prone devices. Fault tolerance. Fixed weight neural networks. Integrated circuit reliability. Multiple valued logic. Nanometer scale devices. Permanent faults. Robustness. Single electron transistors. System level design. Transient faults. Very high density digital systems.