VLSI implementation of new arithmetic residue to binary decoders.

VLSI implementation of new arithmetic residue to binary decoders.

This paper introduces two arithmetic decoders that decode the residue number system into its binary equivalent. The first one deals with the moduli set: (2n,2n-1,2n+1,2n-2(n+12)/+1,2n+2(n+12)/+1), while the other deals with the moduli set: (2n+1,2n-1,2n+1,2n-2(n+12)/+1,2n+2(n+12)/+1), where n is odd...

Full description

Bibliographic Details
Published in:IEEE Transactions on VLSI systems 13, 1 (2005).
Main Author: Hiasat, A.A
Format: Article
Language:English
Subjects:
RNS.
Si.
VLSI.
Binary decoders.
Binary equivalent.
Hardware.
Moduli set.
Multiplicative inverse.
New arithmetic residue decoders.
One carry propagate adder.
Residue number system.
Six carry save adders.
Submicron silicon.
Very large scale integration.