Yiran Chen. Current demand balancing: A technique for minimization of current surge in high performance clock-gated microprocessors. IEEE Transactions on VLSI systems.
توثيق أسلوب شيكاغو (الطبعة السابعة عشر)Yiran Chen. "Current Demand Balancing: A Technique for Minimization of Current Surge in High Performance Clock-gated Microprocessors." IEEE Transactions on VLSI Systems .
توثيق جمعية اللغة المعاصرة MLA (الإصدار التاسع)Yiran Chen. "Current Demand Balancing: A Technique for Minimization of Current Surge in High Performance Clock-gated Microprocessors." IEEE Transactions on VLSI Systems, .
تحذير: قد لا تكون هذه الاستشهادات دائما دقيقة بنسبة 100%.